Process for treating a semiconductor wafer such as a silicon wafer includes a step of controlling a temperature of a silicon wafer to a target temperature while controlling the in-plane temperature distribution of the silicon wafer (or deposit on the silicon wafer) to a desired temperature distribution. During a dry process, for example, it is required to uniformly etch with plasma a surface of a silicon wafer (or deposit layer on the silicon wafer) within a vacuum chamber. For this purpose, a control must be performed so that the temperature of the silicon wafer is uniformly distributed in the plane. There may be a case, however, in which reaction products are reattached to an etching surface during etching process to cause a decrease in an etching rate. Reaction products are likely distributed in a greater amount in an inner peripheral region than in an outer peripheral region. Therefore, although the temperature of the silicon wafer during the plasma etching is controlled so that the temperature is uniformly distributed in the plane, the temperature distribution is requested to be adjusted to vary the temperature in the plane between the outer circumference region and the inner circumference region of a silicon wafer, thereby to compensate for the distribution of the reaction products according to the generation of the reaction products. In other words, the in-plane temperature distribution of the silicon wafer is requested to be precisely adjusted to cancel disturbance. In terms of improving quality of semiconductor devices, it is requested to make the in-plane temperature distribution of the silicon wafer precisely a desired temperature distribution (uniformizing the in-plane temperature distribution and varying the in-plane temperature distribution by region).
Also, at present, in order to etch films made of different materials on a silicon wafer, etching is performed in a chamber which is controlled to be at different temperatures. In order to perform the etching of different films in the same chamber, it is necessary to control the base temperature of the whole silicon wafer to increase up to a target temperature or decrease down to a target temperature for each of the films.
Therefore, during the execution of such a process, it is requested to raise or drop the base temperature of a silicon wafer to a target temperature at a high speed, for the purpose of shortening the manufacturing time of semiconductor devices.
Conventional techniques concerning an apparatus for controlling temperature of a semiconductor wafer such as a silicon wafer mounted on a stage are as follows.
(Conventional Technique Disclosed in Patent Document 1)
Patent document 1 describes an invention in which thermoelectric elements provided in a stage are activated to uniformize the in-plane temperature distribution of a silicon wafer mounted on the stage and to vary the in-plane temperature between the inner circumference region and the outer circumference region.
(Convention Technique Disclosed in Patent Document 2)
Patent document 2 describes an invention in which circulating liquid of different temperatures is supplied in each of flow channels in the stage to uniformize the in-plane temperature distribution of a silicon wafer mounted on the stage and to vary the in-plane temperature distribution between the inner circumference region and the outer circumference region.
(Convention Technique Disclosed in Patent Document 3)
Patent document 3 describes an invention in which low-temperature circulating liquid or high-temperature circulating liquid is selectively supplied in flow channels in a stage so that a base temperature of a silicon wafer is controlled to be a target low temperature or target high temperature.
(Conventionally Executed Techniques)
A heater for heating service and a flow channel are provided in a stage while a low-temperature tank for storing a heat-absorbing circulating liquid is supplied outside the stage. A control is performed so that a low-temperature circulating liquid is supplied in the flow channel from the low-temperature tank while electric power is supplied to the heater when a silicon wafer on the stage is heated, and the low-temperature circulating liquid is supplied in the flow channel from the low-temperature tank while electric power to be supplied to the heater is turned off when the silicon wafer on the stage is cooled.
Conventional Art Documents
Patent Document
Patent document 1: Japanese Patent Application Laid-open (Translation of PCT Application) No. 2000-508119
Patent document 2: Japanese Patent Application Laid-open No. 2003-243371
Patent document 3: Japanese Patent Application Laid-open No. 07-240486